发明名称 THIN FOIL FOR USE IN PACKAGING INTEGRATED CIRCUITS
摘要 Methods for minimizing warpage of a welded foil carrier structure used in the packaging of integrated circuits are described. Portions of a metallic foil are ultrasonically welded to a carrier to form a foil carrier structure. The ultrasonic welding helps define a panel in the metallic foil that is suitable for packaging integrated circuits. Warpage of the thin foil can be limited in various ways. By way of example, an intermittent welding pattern that extends along the edges of the panel may be formed. Slots may be cut to define sections in the foil carrier structure. Materials for the metallic foil and the carrier may be selected to have similar coefficients of thermal expansion. An appropriate thickness for the metallic foil and the carrier may be selected, such that the warpage of the welded foil carrier structure is limited when the foil carrier structure is subjected to large increases in temperature. Foil carrier structures for use in the above methods are also described.
申请公布号 US2010084748(A1) 申请公布日期 2010.04.08
申请号 US20090633703 申请日期 2009.12.08
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 PODDAR ANINDYA;BAYAN JAIME A.;TU NGHIA THUC;WONG WILL K.;PHAM KEN
分类号 H01L23/48;B23K1/06;B32B3/00;B32B15/04;H01L21/50 主分类号 H01L23/48
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