发明名称 SYNCHRONOUS FREQUENCY SYNTHESIZER
摘要 <P>PROBLEM TO BE SOLVED: To provide an apparatus for clock generation using a synchronous frequency synthesizer. <P>SOLUTION: An apparatus for clock generation comprises a phase interpolator 121 that generates an output with a phase value within reference phases associated with two input clocks. Logic units 130 are coupled to determine a plurality number of phase settings for the phase interpolator 121. A divider 122 is coupled to the phase interpolator 121 to generate an output clock on the basis of a modifiable divider setting. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010081606(A) 申请公布日期 2010.04.08
申请号 JP20090219302 申请日期 2009.09.24
申请人 INTEL CORP 发明人 DANI PRAVEEN;FULTON ROBERT;VOLK ANDREW M;MUSUNURI SURYA
分类号 H03L7/081;H03K5/15;H03L7/08 主分类号 H03L7/081
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