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发明名称
Clock frequency divider and trigger signal generation circuit for same
摘要
申请公布号
EP1605594(B1)
申请公布日期
2010.04.07
申请号
EP20050251053
申请日期
2005.02.23
申请人
FUJITSU LIMITED
发明人
MARUTANI, MASAZUMI
分类号
H03K21/00;H03K23/44;H03K23/64
主分类号
H03K21/00
代理机构
代理人
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地址
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