发明名称 Pulse transmission system
摘要 1,078,333. Data transmission. WESTERN ELECTRIC CO. Inc. Oct. 21, 1964 [Oct. 24, 1963], No. 42850/64. Heading H4P. In a data transmission system in which each of a plurality of receivers receives data which is asynchronously related to the data for the other receivers, the receivers are enabled in succession and a common delay means is used to develop timing pulses which are related to the data. The embodiment described has 256 data channels in bus 10 which feed receivers 21 and a sampling and storage arrangement (not shown). Clock pulses are fed to each receiver by line 27, and these pulses also feed a counter to deliver a 8-bit count on line 26. The clock speed is sufficiently high that the counter cycles about seven times during each received data bit. Each receiver comprises a gate 90 which responds to one particular count received on line 26 so that the receivers' gates 90 pulse in succession. When a start bit is received from bus 10 on line 91, as soon as gate 90 pulses a pulse passes via gates 97, 96 to line 23 which feeds a tapped delay line common to all the receivers. The pulse also feeds toggle 98 which now inhibits gate 96 and so prevents further pulses from this receiver being fed to the delay line. The taps on the delay provide pulses at times which are multiples of the counter cycle time and which correspond approximately to the centre of each bit. Interleaved with these pulses are pulses resulting from other receivers. The delay's outputs are fed to all the receivers over line 14, the pulses relevant to a particular receiver being selected by gating at 100 with the output of gate 90. The output of gate 100 is used for sampling the received data.
申请公布号 GB1078333(A) 申请公布日期 1967.08.09
申请号 GB19640042850 申请日期 1964.10.21
申请人 WESTERN ELECTRIC COMPANY, INCORPORATED 发明人
分类号 G01S1/64;H01L27/088;H01L29/00;H03F3/193;H03G1/00;H03H9/36;H03H11/24;H03K17/691;H04L12/54;H04L13/08 主分类号 G01S1/64
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