发明名称 Substrate and semiconductor package for lessening warpage
摘要 A substrate with reduced substrate warpage and a semiconductor package utilizing the substrate are revealed. The substrate primarily comprises a core where a wiring layer and a first solder mask are formed on one surface of the core, and a second solder mask and a die-attaching layer are formed on the other surface of the core. The first solder mask has a thickness difference with respect to the second solder mask in a manner to reduce the warpage of the substrate caused by thermal stresses due to temperature differences can be well under control. Therefore, the manufacturing cost of the substrate can be lower without adding extra stiffeners to achieve substrate warpage control during semiconductor packaging processes.
申请公布号 US7692313(B2) 申请公布日期 2010.04.06
申请号 US20080042105 申请日期 2008.03.04
申请人 POWERTECH TECHNOLOGY INC. 发明人 FAN WEN-JENG
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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