发明名称 Automatically generating an input sequence for a circuit design using mutant-based verification
摘要 One embodiment of the present invention provides a system that automatically generates an input sequence for a circuit design using mutant-based verification. During operation, the system receives a description of the circuit design. Next, the system determines a target value for a control signal in the description and a mutant value for the control signal. The system then determines if an input sequence exists for the circuit design that stimulates the control signal to the target value and causes the effects of the target value and the effects of the mutant value to reach an observation point in the circuit such that the effects of the target value and the effects of the mutant value differ at the observation point. If such an input sequence exists, the system then simulates operation of the circuit design using the input sequence. During simulation, the system generates two sets of signal outputs for the circuit design. The first set of signal outputs is affected by the target value for the control signal, while the second set of signal outputs is affected by the mutant value for the control signal.
申请公布号 US7694253(B2) 申请公布日期 2010.04.06
申请号 US20070805902 申请日期 2007.05.24
申请人 THE REGENTS OF THE UNIVERSITY OF CALIFORNIA 发明人 CAMPOS JORGE;AL-ASAAD HUSSAIN
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
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