发明名称 |
Non-volatile memory having a static verify-read output data path |
摘要 |
A memory has first and second memory arrays and first and second sense amplifiers coupled to the first and second memory arrays, respectively. A verify data line is coupled to first outputs of the first sense amplifier and the second sense amplifier as well as to a program/erase controller. The verify data line has a first logic circuit having a first input coupled to the first output of the first sense amplifier and an output. A second logic circuit has a first input coupled to the output of the first logic circuit, a second input coupled to the first output of the second sense amplifier, and an output. A global data line is coupled to a second output of the first sense amplifier and a second output of the second sense amplifier. A global sense amplifier is coupled to the global data line.
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申请公布号 |
US7692989(B2) |
申请公布日期 |
2010.04.06 |
申请号 |
US20070740331 |
申请日期 |
2007.04.26 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
SANJEEVARAO PADMARAJ;CHRUDIMSKY DAVID W. |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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