| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To facilitate evaluation of capabilities of transistors and systematic variations in wiring capacitance and resistance in a SRAM cell array. <P>SOLUTION: Test cells are disposed at ends of an array as an inverter circuit forming a ring oscillator, and the ring oscillator is operated by charging and discharging bit lines. More concretely, a ring oscillator is formed on the memory cell array, including the test cells arranged at least at the four corners of the memory cell array. At this point, the test cells are connected to one another by using the wiring corresponding to the bit lines. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
