发明名称 MANUFACTURING METHOD OF MULTILAYER WIRING BOARD, MULTILAYER WIRING BOARD, AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide the manufacturing method of a multilayer wiring board which is excellent in insulation reliability by achieving stable removal of palladium metal deposited on an insulating layer as an electroless plating catalyst in a semi-additive process of the multilayer wiring board. SOLUTION: The manufacturing method of a multilayer wiring board includes a step (A) of forming the insulating layer on a first conductor circuit and a step (B) of forming a second conductor circuit on the insulating layer by electroless plating and electrolytic plating. The step (A) of forming the insulating layer on the first conductor circuit includes a step (A1) of sticking the insulating layer to the first conductor circuit and a step (A2) of hardening the insulating layer after roughening the surface of the insulating layer, and the step (B) of forming the second conductor circuit on the insulating layer by electroless plating and electrolytic plating includes a step (B1) of depositing palladium metal on the insulating layer during electroless plating, a step (B2) of forming the second conductor circuit, and a step (B3) of removing the deposited palladium metal after formation of the second conductor circuit. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010073986(A) 申请公布日期 2010.04.02
申请号 JP20080241354 申请日期 2008.09.19
申请人 SUMITOMO BAKELITE CO LTD 发明人 TACHIBANA KENYA
分类号 H05K3/42;H05K3/46 主分类号 H05K3/42
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