发明名称 TESTING APPARATUS AND TESTING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To reduce the power consumption of a testing apparatus for electronic devices, such as LSI. Ž<P>SOLUTION: The testing apparatus for testing a device under testing by providing the device under testing with a testing signal includes: a periodic signal generation section for generating a periodic signal providing a testing period; a pattern generation section for generating a testing pattern indicating the pattern of the testing signal and an output allowance pattern, indicating allowance for outputting the testing signal on the basis of the periodic signal; an output waveform generation section for generating an output waveform, in accordance with the testing pattern when the output allowance pattern in at least the present period of the periodic signal is in the allowed state; an allowed waveform generating section for generating an allowed waveform, in accordance with the output allowance pattern; and a signal output section for outputting the testing signal, in accordance with the output waveform, when the allowed waveform is in the allowed state. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010071697(A) 申请公布日期 2010.04.02
申请号 JP20080237154 申请日期 2008.09.16
申请人 ADVANTEST CORP 发明人 WATANABE NAOYOSHI
分类号 G01R31/28 主分类号 G01R31/28
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