| 摘要 |
Decoding Huffman codes is accomplished by identifying consecutive strings of high order ones or zeroes and following consecutive strings of high order ones or zeroes, retrieving a table entry for each string based on its run count and bit value, until the retrieved entry contains the decoding output symbol, or until the remaining bits of the code word number within a predetermined threshold. The remaining bits are used as an offset into a lookup table, but the dimensions of the table have been reduced through elimination of the leading ones and zeroes. The consecutive strings are preferably processed by a hardware accelerator to identify the repeated bit, count the bits in the string and return this information to the host processor. The efficiencies of decoding canonical codes are realized; yet, non-canonical codes can be decoded. |
