| 摘要 |
In a clock-synchronous communication system, a clock pulse as a communication clock is outputted from a master device to a slave device so as to synchronize the master device and slave device. The transmitting side transmits a data to a data line with a first edge timing of the clock pulse, and the receiving side receives the data from the data line with a second edge timing of the clock pulse. A microcomputer as the master device is configured to enable separate setting of high-level duration and low-level duration of a clock pulse to be outputted, using a program. High-level duration and low-level duration are each set to a minimum value that satisfies the requirements for constituting communication with a communication destination. Uprating not only the cycle of a clock pulse but also the communication baud rate, efficient clock-synchronous communication can be performed.
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