| 摘要 |
A structure and fabrication process for a carbon nanotube field effect transistor is disclosed herein. The structure employs an asymmetric gate which is closer to the source and farther from the drain, which helps to minimize“off current”drain leakage when the drain is biased and the gate is otherwise off. In an embodiment, the source and drain are preferably self aligned to the gate, and preferably the gate is first defined as a conductive sidewall to an etched pad. Dielectric sidewalls are then defined over the gate, which in turn defines the positioning of the source and drain in a predetermined spatial relationship to the gate. In a preferred embodiment, the source and drain comprise conductive sidewalls buttressing the dielectric sidewalls. The channel of the device preferably comprises randomly oriented carbon nanotubes formed on an insulative substrate and isolated from the gate by an insulative layer. In a preferred embodiment, the carbon nanotubes are exposed via the dielectric sidewall etch, thus ensuring the gate's self alignment with the subsequently-formed source and drain.
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