发明名称 Analog Access Circuit for Validating Chalcogenide Memory Cells
摘要 An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.
申请公布号 US2010074000(A1) 申请公布日期 2010.03.25
申请号 US20080525510 申请日期 2008.11.26
申请人 LI BIN;BUMGARNER ADAM MATTHEW 发明人 LI BIN;BUMGARNER ADAM MATTHEW
分类号 G11C7/00;G11C11/00 主分类号 G11C7/00
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