发明名称 |
DYNAMIC SCALABLE CONCURRENT COMMUNICATION AND MULTI-CORE RECEIVER ARCHITECTURE |
摘要 |
An integrated multi-core RF device includes a common amplifier which outputs an amplified RF signal. A common transmission line is configured to supply the amplified RF signal to a plurality of common transmission line distribution connections. Each receiver core of a plurality of receiver cores has a receiver core RF input coupled to one of the plurality of common transmission line distribution connections. Each core is configured to be tunable to a channel and to output at least one baseband output per channel. The integrated multi-core RF device is configured to concurrently down convert a plurality of channels to corresponding down converted baseband signals. The integrated multi-core RF device is configured to allow dynamic selection of the one or more of the plurality of channels over time. A method to recover a DSCC receiver IC is also described.
|
申请公布号 |
US2010075622(A1) |
申请公布日期 |
2010.03.25 |
申请号 |
US20090564454 |
申请日期 |
2009.09.22 |
申请人 |
CALIFORNIA INSTITUTE OF TECHNOLOGY |
发明人 |
WANG YU-JIU;HAJIMIRI SEYED ALI |
分类号 |
H04B7/12 |
主分类号 |
H04B7/12 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|