发明名称 DATA PROCESSOR
摘要 <p><P>PROBLEM TO BE SOLVED: To efficiently issue a superscalar instruction in an instruction set including an instruction with a prefix. <P>SOLUTION: Circuits (EX-ISD, LS-ISD, BR-ISD) are adopted, which search instructions by each instruction code type other than the prefix, based on a determination result by decoders (PD0-PD3) for determining the instruction code type, add the last instructions to each searched instruction, and output the instructions to an instruction performing means. The circuits output an instruction other than the last target instruction code type as a prefix code candidate together with a detection instruction, when the instruction of the target instruction code type is detected in a plurality of instruction units to be searched, output the instruction at the rear end as the prefix code candidate, when the instruction of the target instruction code type is not detected at the rear ends of the plurality of instruction units to be searched, and then, output the instruction at the head, when the instruction of the target instruction code type is detected at the head of the instruction code searching. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010066893(A) 申请公布日期 2010.03.25
申请号 JP20080231148 申请日期 2008.09.09
申请人 RENESAS TECHNOLOGY CORP 发明人 ARAKAWA FUMIO
分类号 G06F9/318 主分类号 G06F9/318
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