| 摘要 |
<P>PROBLEM TO BE SOLVED: To facilitate both suppression of the occurrence of a dummy pattern being in a floating state and equalization of a pattern density of a wiring layer in a semiconductor device. Ž<P>SOLUTION: A design device of a semiconductor device extracts a wiring pattern of a layer where a dummy pattern is to be generated, from layout data of the semiconductor device and then extracts a fixed potential pattern from the wiring pattern. Next the design device of the semiconductor device inverts the pattern from which the fixed potential pattern has been removed, and generates such a dummy pattern that a gap is formed between the pattern before inversion and the pattern after inversion and then performs inter-layer connection between the dummy pattern and a fixed potential pattern in a lower or an upper layer. Finally, the design device of the semiconductor device combines dummy pattern data and inter-layer connection data with the layout data. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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