发明名称 FLASH MIRROR BIT ARCHITECTURE USING SINGLE PROGRAM AND ERASE ENTITY AS LOGICAL CELL
摘要 Flash memory systems and methods are provided for facilitating a single logical cell erasure in a flash memory device. Logical cell mapping is changed from using a single physical cell to using pair physical cells, thereby creating a single program and erase entity as a single logical cell. By mapping two adjacent physical cells as a single logical cell, the flash memory device can be programmed and erased on a single bit or variable bit length basis with conventional technologies. Various operations can be performed on a flash device on a basis of the single program and erase entity.
申请公布号 US2010074007(A1) 申请公布日期 2010.03.25
申请号 US20080234737 申请日期 2008.09.22
申请人 SPANSION LLC 发明人 PARKER ALLAN
分类号 G11C16/04;G11C16/06 主分类号 G11C16/04
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