发明名称 CURRENT MODE MEMORY APPARATUS, SYSTEMS, AND METHODS
摘要 Some embodiments include a first circuit to drive signals at first circuit output nodes, and a second circuit to generate output signals at second circuit output nodes. The second circuit includes a first transistor coupled between a supply node and a first node of the second circuit output nodes and a second transistor coupled between the supply node and a second node of the second circuit output nodes. Each of the first and second transistors includes a gate coupled to one of the first and second nodes. Other embodiments including additional apparatus, systems, and methods are disclosed.
申请公布号 US2010074036(A1) 申请公布日期 2010.03.25
申请号 US20090625035 申请日期 2009.11.24
申请人 VO HUY T 发明人 VO HUY T.
分类号 G11C7/10;H03K3/00 主分类号 G11C7/10
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