| 摘要 |
A stacked semiconductor chip assembly is disclosed, as are different embodiments relating to same. The stacked chip assembly preferably includes a plurality of units which include a substrate with microelectronic components mounted on each. The individual units desirably are thin and directly abut one another so as to provide a low-height assembly and uniform spacing. Warping of the stacked package is desirably limited by placing bumpers between adjacent units to provide a balanced support, while applying a downward pressure on the units during reflow to control height tolerances.
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