Method and apparatus for implementing FIFOs using time-multiplexed memory in an integrated circuit

摘要

Method and apparatus for implementing first-in-first-out (FIFO) memories using time-multiplexed memory in an integrated circuit are described. A block random access memory (BRAM) circuit embedded in the integrated circuit is provided. The BRAM includes at least one port responsive to a respective at least one BRAM clock signal. FIFO logic is configured to implement a plurality of FIFOs in the BRAM having a plurality of interfaces. Multiplexer logic is configured to selectively couple the plurality of output interfaces of the FIFO logic to the at least one port of the BRAM circuit responsive to at least one FIFO clock signal. Each of the at least one BRAM clock signal has at least twice the frequency of a respective one of the at least one FIFO clock signal.