| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an RF (radio frequency) receiver for remarkably suppressing power consumption by using a DC-DC converter. Ž<P>SOLUTION: The RF receiver 1 includes an analog circuit 100 for outputting an analog signal f2 obtained by down-conversion of a high frequency signal f1 received with an antenna 10, an oscillator 110 for generating a sampling clock SCLK, an analog-digital converting circuit 103 for converting an analog signal f2 into a digital signal f3 based on the sampling clock SCLK, a frequency divider 130 for generating a frequency-divided clock hCLK by dividing the frequency of sampling clock SCLK, a timing adjustment circuit 140 for generating an operating clock DCLK delayed from the frequency-divided clock hCLK during the period in which the analog-digital converting circuit 103 does not yet convert the analog signal f2 into the digital signal f3, and a DC-DC converter 200 for converting a first power supply voltage VDD supplied from an external circuit into a second power supply voltage hVDD based on the sampling clock SCLK and operating clock DCLK. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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