| 摘要 |
PROBLEM TO BE SOLVED: To improve response performance by reducing an overhead caused by rewrite time. SOLUTION: A DMA (Direct Memory Access) device includes: first and second buffers 101, 102 for holding request numbers to identify a transfer request, and transfer information to be required for the transfer request; and a priority order comparing circuit 105 which refers to a management table where the transfer request is associated with a priority level, updates the transfer information stored in the second buffer 102 into the transfer information of new input transfer request when the priority level of the new input transfer request is higher than the priority level of the transfer request held in the second buffer 102, and updates the transfer information stored in the first buffer 101 into the transfer information of the new input transfer request when the priority level of the new input transfer request is lower than the priority level of the transfer request held in the second buffer 102. COPYRIGHT: (C)2010,JPO&INPIT
|
