发明名称 A PROCESS FOR WAFER BONDING
摘要 The present disclosure provide a method of manufacturing a microelectronic device. The method includes forming a top metal layer on a first substrate, in which the top metal layer has a plurality of interconnect features and a first dummy feature; forming a first dielectric layer over the top metal layer; etching the first dielectric layer in a target region substantially vertically aligned to the plurality of interconnect features and the first dummy feature of the top metal layer; performing a chemical mechanical polishing (CMP) process over the first dielectric layer; and thereafter bonding the first substrate to a second substrate.
申请公布号 KR100948152(B1) 申请公布日期 2010.03.18
申请号 KR20070133365 申请日期 2007.12.18
申请人 发明人
分类号 H01L21/60;H01L21/304;H01L21/31 主分类号 H01L21/60
代理机构 代理人
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