<p>This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.</p>
申请公布号
KR20100029778(A)
申请公布日期
2010.03.17
申请号
KR20097027306
申请日期
2008.06.26
申请人
MEMC ELECTRONIC MATERIALS, INC.
发明人
FALSTER ROBERT J.;VORONKOV VLADIMIR V.;MOIRAGHI LUCA;LEE, DONG MYUN;CHO, CHAN RAE;RAVANI MARCO