发明名称 |
Memory interface including generation of timing signals for memory operation |
摘要 |
A memory device includes an interface controller for communication with a semiconductor device over a communication link. A clock signal is transmitted from the semiconductor device over the link to the memory device. A frequency of the clock signal may be any within a given range of frequencies. A frequency value signal conveying the value of the frequency of the clock signal is also transmitted. The interface controller includes circuitry for deriving from the clock signal and from the frequency value signal at least one timing signal for any operation in the memory device.
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申请公布号 |
US7680966(B1) |
申请公布日期 |
2010.03.16 |
申请号 |
US20040933697 |
申请日期 |
2004.09.03 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
FALIK OHAD;JOHNSTON PAUL |
分类号 |
G06F3/00 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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