发明名称 Selective formation of stress memorization layer
摘要 A method of forming a semiconductor structure includes providing a semiconductor substrate comprising a first region and a second region, forming a first PMOS device in the first region wherein a first gate electrode of the first PMOS device has a first p-type impurity concentration, forming a stress memorization layer over the first PMOS device, reducing the stress memorization layer in the first region, performing an annealing after the step of reducing the stress memorization layer in the first region, and removing the stress memorization layer. The same stress memorization layer is not reduced in a region having an NMOS device. The same stress memorization layer may not be reduced in a region including a second PMOS device.
申请公布号 US7678636(B2) 申请公布日期 2010.03.16
申请号 US20060520377 申请日期 2006.09.13
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHUANG HARRY;LIANG MONG-SONG;THEI KONG-BENG;KAO JUNG-HUI;CHENG CHUNG LONG;CHUNG SHENG-CHEN;GUO WEN-HUEI
分类号 H01L21/8238;H01L21/337 主分类号 H01L21/8238
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