发明名称 Signal processing circuit
摘要 A signal processing circuit is configured by connecting a plurality of basic circuits connected in series, each of the basic circuits comprising an arithmetic circuit subjecting a first input signal and a second input signal to a signal processing; a first selection circuit outputting the first input signal or an output signal of the arithmetic circuit; and a second selection circuit outputting the second input signal or an output signal of the arithmetic circuit, so as to make it possible to change operations of the circuit as a whole by properly making a selection on which signal should be output with the aid of the first and second selection circuits, and to execute different signal processing on a single circuit depending on the selection.
申请公布号 US7680282(B2) 申请公布日期 2010.03.16
申请号 US20040943926 申请日期 2004.09.20
申请人 FUJITSU LIMITED 发明人 ODATE NAOKI;YODA KATSUHIRO
分类号 H03M13/37;H04L9/00;H03M13/09;H03M13/23;H03M13/27;H04K1/00 主分类号 H03M13/37
代理机构 代理人
主权项
地址