发明名称 |
POWER-OFF CONTROLLING CIRCUIT, AND POWER-OFF CONTROLLING METHOD |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a power-off controlling circuit and a power-off controlling method, for controlling power-off of an integrated circuit based on the strength of leak current. Ž<P>SOLUTION: The power-off controlling circuit includes: a model circuit section including a model circuit made by modelling a basic circuit of an integrated circuit; a voltage comparing circuit section for comparing output voltage charged by a leak current occurring at the model circuit with a preset reference voltage; a determination circuit section for measuring a time of arrival spent by the output voltage arriving at the reference voltage from the compared result and determining the strength of the leak current from the measured result; and a power-off controlling circuit section for controlling power-off of the integrated circuit on the basis of the determined strength of the leak current. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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申请公布号 |
JP2010056756(A) |
申请公布日期 |
2010.03.11 |
申请号 |
JP20080218289 |
申请日期 |
2008.08.27 |
申请人 |
SHIBAURA INSTITUTE OF TECHNOLOGY |
发明人 |
USAMI MASAYOSHI |
分类号 |
H03K19/00;G05F3/26;H01L21/822;H01L27/04;H03K19/0948 |
主分类号 |
H03K19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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