发明名称 CURRENT GENERATING CIRCUIT AND DISPLAY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To make a circuit scale smaller in a current generating circuit that has a plurality of current transistors for generating a plurality of unit currents and generates gradation currents corresponding to the gradations of display data. <P>SOLUTION: In the case of, for example, 8-bit data, eight bias potentials VN1 to VN8 of different potential levels are outputted from the output terminals of a bias generating circuit 10. Gate electrodes of eight fixed current transistors Q10 to Q17 set to the identical channel widths (W) and the identical channel length (L) are connected to the output terminals of the bias generating circuit 10. Unit currents corresponding to the bits of the data are caused to flow in the corresponding fixed current transistors Q10 to Q17. These current transistors Q10 to Q17 are selectively operated, and a gradation current produced by selecting each unit current is supplied to a display 5. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010054605(A) 申请公布日期 2010.03.11
申请号 JP20080216911 申请日期 2008.08.26
申请人 CASIO COMPUT CO LTD 发明人 KASHIYAMA SHUNJI
分类号 G09G3/30;G09G3/20;H01L51/50;H03K17/00;H03K17/693;H05B33/14 主分类号 G09G3/30
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