| 摘要 |
PROBLEM TO BE SOLVED: To minimize wiring length between a memory block and a logic module in designing of a semiconductor integrated circuit for overlapping a memory array chip and a logic module chip to each other. SOLUTION: A semiconductor integrated circuit design method includes: a grouping process for grouping memory blocks and logic modules included in a logic circuit to be designed; a group arranging process on the logic module chip for arranging each group generated by the grouping on the logic module chip; and a memory block selecting process on the memory array chip for selecting a memory block to be allocated to the memory array chip on the basis of the arrangement result of each group on the logic module chip. COPYRIGHT: (C)2010,JPO&INPIT
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