发明名称 DLL CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a DLL circuit having high-accuracy synchronous characteristics. <P>SOLUTION: The DLL circuit includes: a variable delay circuit 11 to which a first clock signal CLK1 is inputted, which outputs a second clock signal CLK2 generated by delaying the first clock signal CLK1, and whose delay time is varied by a control signal Vc; a phase detection circuit 12 to which the first clock signal CLK1 and the second clock signal CLK2 are inputted and which compares the phase of the first clock signal CLK1 with that of the second clock signal CLK2 so as to output a signal according to the phase differenceΔΦ; an integration circuit 13 for integrating output V1 of the phase detection circuit 12; a comparison circuit 14 which compares output V2 of the integration circuit 13 with a predetermined reference value Vref so as to output the comparison result; and a low-pass filter 15 which averages output V3 of the comparison circuit 14 so as to output a signal, whose high-frequency component is removed, to the variable delay circuit 11 as the control signal Vc. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010056758(A) 申请公布日期 2010.03.11
申请号 JP20080218357 申请日期 2008.08.27
申请人 TOSHIBA CORP 发明人 SHIBAYAMA HIROYUKI
分类号 G06F1/06;H03K5/13;H03L7/081 主分类号 G06F1/06
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