| 摘要 |
<P>PROBLEM TO BE SOLVED: To detect disturbance of regularity of an address included in a test pattern of a semiconductor memory. <P>SOLUTION: An address AD generated for a memory access test is input to memory test devices TST and WS. The memory test devices TST and WS detect a change in different addresses AD. When the change is different, the memory test devices TST and WS output information showing that the change is different. Thus, it is possible to detect the disturbance of the regularity of the address AD, and to verify that there is the possibility that an error occurs in the address AD to be used for the memory access test. As a result, it is possible to improve the debugging efficiency of a program TPRG for executing the memory access test. <P>COPYRIGHT: (C)2010,JPO&INPIT |
