PURPOSE: A semiconductor memory device is provided to secure the stability of a data input operation by separating a data input buffer into a synchronous type and an asynchronous type and transmitting simultaneously a data and a clock. CONSTITUTION: A clock generator(50) generates an internal clock. Asynchronous data input buffers(30-1 to 30-3) output a buffering data by buffering data which is input through a data pad. Synchronous data input buffers(70-1 to 70-3) buffers the buffering data by synchronizing the internal clock. A line length transmitting the internal clock to the synchronous data input buffer is identical to a line length transmitting the buffering data to the synchronous data input buffer. Clock drivers(60-1 to 60-3) transmit the internal clock which is output from the clock generator to the synchronous data input buffer. Data drivers transmit the buffering data which is output from the asynchronous data input buffer to the synchronous data input buffer.
申请公布号
KR100945816(B1)
申请公布日期
2010.03.10
申请号
KR20080086751
申请日期
2008.09.03
申请人
HYNIX SEMICONDUCTOR INC.
发明人
LEE, JI WANG;KIM, YONG JU;HAN, SUNG WOO;SONG, HEE WOONG;OH, IC SU;KIM, HYUNG SOO;HWANG, TAE JIN;CHOI, HAE RANG;JANG, JAE MIN;PARK, CHANG KUN