发明名称 CACHE FOR A MULTI THREAD AND MULTI CORE SYSTEM AND METHODS THEREOF
摘要 <p>A method includes storing a plurality of data RAM, holding information for all outstanding requests forwarded to a next-level memory subsystem, clearing information associated with a serviced request after the request has been fulfilled, determining if a subsequent request matches an address supplied to one or more requests already in-flight to the next-level memory subsystem, matching fulfilled requests serviced by the next-level memory subsystem to at least one requester who issued requests while an original request was in-flight to the next level memory subsystem, storing information specific to each request comprising a set attribute and a way attribute configured to identify where the returned data should be held in the data RAM once the data is returned, the information specific to each request further including at least one of thread ID, instruction queue position and color, and scheduling hit and miss data returns.</p>
申请公布号 EP2160683(A2) 申请公布日期 2010.03.10
申请号 EP20080771309 申请日期 2008.06.18
申请人 INTEL CORPORATION 发明人 PIAZZA, THOMAS;DWYER, MICHAEL;CHENG, SCOTT
分类号 G06F12/00 主分类号 G06F12/00
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