| 摘要 |
PURPOSE: A clock generating circuit is provided to prevent the malfunction by multiplying a reference clock through the oscillator including the circuit with a simple structure. CONSTITUTION: A clock generation circuit includes a delay locking unit(301) and an oscillator(320). The delay locking unit has a similar structure to the existing delay locked loop circuit. The delay locking unit includes a phase controller(303) and a voltage control delay unit(309). The delay locking unit generates a plurality of delay clocks by delaying a reference clock. The oscillator includes N delay elements and a phase inversion unit(326). The delay unit is arranged on the forward path of the oscillator. The phase inversion unit is arranged in a feedback path. The oscillation clock of the oscillator is inverted by the phase inversion unit.
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