| 摘要 |
A process is described for forming a fully multiple silicided gate for complementary MOSFET (CMOS) devices. A silicidation process is performed on a gate structure, which includes a gate material overlying a gate dielectric disposed on a substrate. A layer of insulating material is formed which covers the gate structure; the thickness of this layer is less at sidewalls of the gate structure than on a top surface of the gate structure. A portion of the layer of insulating material is then removed, so that the sidewalls of the gate structure are exposed. A layer of metal is formed which covers the gate structure so that the metal is in contact with the sidewalls of the gate structure. The silicidation process is then performed, in which a metal silicide is formed from the gate material and the metal; the gate material is thereby fully silicided.
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