发明名称 |
DIGITAL DATA INVERSION FLAG GENERATOR CIRCUIT |
摘要 |
An integrated circuit includes an array of memory cells and a digital flag generator circuit configured to generate a data inversion flag based on whether a number of logical zero bits contained in a data word to be transmitted from the memory cells is greater than a threshold number. The digital flag generator circuit includes a first digital stage including a first plurality of binary logic circuits. Each of the binary logic circuits is configured to receive a subset of the data word.
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申请公布号 |
US2010052729(A1) |
申请公布日期 |
2010.03.04 |
申请号 |
US20080201876 |
申请日期 |
2008.08.29 |
申请人 |
BROX MARTIN;SCHNEIDER RONNY |
发明人 |
BROX MARTIN;SCHNEIDER RONNY |
分类号 |
H03K19/00;G11C11/34 |
主分类号 |
H03K19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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