发明名称 |
MEMORY DEVICE AND METHOD THEREOF |
摘要 |
The present application discloses a memory array where each memory bit cell of the array includes a level shifter. In addition, each memory bit cell includes a write port that includes pass gate that can include a p-type field effect transistor and an n-type field effect transistor. The control electrodes of the p-type field effect transistor and the n-type field effect transistor are connected together as part of a common node. In addition, a current electrode of the p-type field effect transistor and a current electrode of the n-type field effect transistor are connected together to form a common node.
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申请公布号 |
US2010054051(A1) |
申请公布日期 |
2010.03.04 |
申请号 |
US20080199093 |
申请日期 |
2008.08.27 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
DE LA CRUZ, II LOUIS A.;REMINGTON SCOTT I. |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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