| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a peak limiter circuit for reducing the number of multipliers to use, and for enabling a cost of a logic resource to be low. <P>SOLUTION: The peak limiter circuit 1 includes: a TAP coefficient storing unit 16 for storing a signal pattern having characteristics of impulse response, a peak detection circuit 14 for detecting an input signal exceeds a predetermined threshold value and an amplitude of the input signal to be a peak; and an adjusting circuit 18 for suppressing the input signal by a signal pattern stored in the TAP coefficient storing unit 16 when the peak detection circuit 14 detects the peak. <P>COPYRIGHT: (C)2010,JPO&INPIT |
