发明名称 |
DISABLING PORTIONS OF MEMORY WITH DEFECTS |
摘要 |
An apparatus and methods are disclosed herein for identifying and avoiding attempts to access a defective portion of memory. Errors associated with portions of memory, such as a cache memory, are tracked over time enabling detection of both hard and erratic errors. Based on the number of errors tracked over time for a portion of memory, it is determined if the portion of memory is defective. In response to determining portion of memory is defective, the portion of memory is disabled. The portion of memory may be flushed and moved before being disable. Additionally, disabling the portion of memory may be conditioned upon determining if it is allowable to disable the portion of memory.
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申请公布号 |
US2010058109(A1) |
申请公布日期 |
2010.03.04 |
申请号 |
US20090614535 |
申请日期 |
2009.11.09 |
申请人 |
CHANG TSUNG-YUNG JONATHAN;SRIVASTAVA DURGESH;SHOEMAKER JONATHAN;BENOIT JOHN |
发明人 |
CHANG TSUNG-YUNG (JONATHAN);SRIVASTAVA DURGESH;SHOEMAKER JONATHAN;BENOIT JOHN |
分类号 |
G06F11/07;G06F11/10;H03M13/05 |
主分类号 |
G06F11/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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