发明名称 PLACE-AND-ROUTE LAYOUT METHOD WITH SAME FOOTPRINT CELLS
摘要 This invention discloses a method for automatically generating an integrated circuit (IC) layout, the method comprises determining a first cell height, creating a plurality of standard cells all having the first cell height, and generating the IC layout from the plurality of standard cells by placing and routing thereof.
申请公布号 US2010058267(A1) 申请公布日期 2010.03.04
申请号 US20080199617 申请日期 2008.08.27
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LU LEE-CHUNG;WANG CHUNG-HSING;LI PING CHUNG;TAI CHUN-HUI;TIEN LI-CHUN;CHANG GWAN SIN
分类号 G06F17/50 主分类号 G06F17/50
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