| 摘要 |
1,247,343. Multiplying circuits. SOLARTRON ELECTRONIC GROUP Ltd. 4 Dec., 1968 [5 Dec., 1967], No. 55184/67. Heading G4G. [Also in Division G1] In order to test the response of a system (e.g. a servo system, electrical component, manufacturing process) to an input signal of relatively high frequency # H , using a correlator adapted to operate at relatively lower frequency, a first signal at the high frequency # H and two second signals at a relatively lower frequency # L differing in phase are generated. From these signals a third signal having a frequency equal to the sum or difference of the high frequency # H and the relatively lower frequency # L is generated. One of the first and third signals is applied to the system under test. The output signal from the system is multiplied by the other of the first and third signals and the thus formed multiplied signal is compared in the correlator with the two second signals of the lower frequency # L . The resultant signals from the correlator represent the response of the system to a high frequency signal. The arrangement enables systems to be tested at frequencies up to 1 MHz. using a correlator operating up to say 1500 Hz. In one arrangement (Fig. 3) a high frequency oscillator 20 provides two 90 degree phase displaced output signals sin # H t, cos # H t. These are respectively multiplied at 31, 32 with corresponding 90 degrees phase displaced outputs from a low frequency oscillator 30, and the outputs from the two multipliers subtracted in the unit 33. The resultant output from this will be proportional to cos (# H + # L )t and is applied to the system under test. This modifies it to provide an output R cos {(# H +# L )t+#} (1) where R and # depend on the test system, and this output signal is multiplied by a high frequency signal component, cos # H t, to provide an output R/ 2 {cos ((2# H + # L )t + # + cos (# L t + #)} (2) This signal is applied to the correlator 40 which has two paths (Fig. 1, not shown), in one of which the output (2) is multiplied by cos # L t and in the other by sin # L t, the resultant products being integrated. Because the correlator responds only to low frequencies, it processes only the part R/ 2 cos (# L t + #) of the output (2), to provide output signals from its two channels R/ 2 and #, which are applied to appropriate displays. The multipliers 31, 32 may be any non-linear arrangement, since any harmonics will be rejected by the correlator. In particular they may be switches operated by square waves at the low frequency. The multiplier 24 may receive any signal cos (# H t+#) since # will appear in the display merely as a constant. The high frequency oscillator 20 is frequency locked to the low frequency oscillator by frequency dividing down an output from it, by, say, 1000, subtracting a signal from the low frequency oscillator and using the resultant to control the high frequency oscillator (Fig. 5, not shown). In an alternative system the high frequency signal is applied directly to the system under test and the multiplied and subtracted signal (see expression (1)) applied to the multiplier 34 (see Fig. 4, not shown). In a suitable arrangement for the multipliers 31, 32 (Fig. 6) the high frequency signals are applied both normally and inverted to the drain electrodes of field effect transistors while corresponding low frequency signals are applied to the control electrodes. The source electrodes of each pair receiving normal and inverted inputs are connected together and to a respective input of a differential amplifier forming the adder 33. In a suitable circuit for the multiplier 34 (Fig. 7), the multiplier signal (# H + # L )t (Fig. 4 embodiment) is applied to the emitters of a longtailed pair 71, 72 and inverted to the emitters of a second pair 73, 74. The signal from the system under test is applied to the base of transistors 72, 73 in these pairs and the outputs from the collectors 71, 73 are added to provide the multiplier output. |
