发明名称 INPUT-SIGNAL RECOVERY CIRCUIT AND ASYNCHRONOUS SERIAL BUS DATA RECEPTION SYSTEM USING THE SAME
摘要 An input-signal recovery circuit receives a received data signal and a delay control signal and processes the received data signal. The input-signal recovery circuit includes a data switch detector comprising an input end receiving the received data signal and an output end; a pulse generator comprising a plurality of logic circuits and receiving the received data signal and the delay control signal to generate a plurality of delayed pulse signals; a plurality of switches, each of the switch electrically connected to one corresponding logic circuit, wherein one of the switches is selectively turned on by the data switch detector. The data switch detector selects an output pulse signal from a specific switch when the data switch detector senses a logic state change in the received data signal. The input-signal recovery circuit can prevent data error from error accumulation due to physical difference of crystal oscillators.
申请公布号 US2010052754(A1) 申请公布日期 2010.03.04
申请号 US20090393737 申请日期 2009.02.26
申请人 HUANG CHIN-CHENG 发明人 HUANG CHIN-CHENG
分类号 H03K5/01 主分类号 H03K5/01
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