发明名称 MICROPATTERNING PROCESS FOR NEURAL NETWORKS USING THREE-DIMENSIONAL STRUCTURES
摘要 PURPOSE: A neuron chip capable of patterning neural cells using three dimensional physical structure and a method for patterning are provided to easily form neural cell network and produce microelectrode array(MEA) chip. CONSTITUTION: A method for patterning neural cells in a neuron chip using three dimensional PDMS structure comprises: a first process of manufacturing a silicon master substrate having plural three dimensional recesses; a second process of pouring PDMS mixture solution on a silicon master substrate to form PDMS substrate having lane and plural three dimensional structure; a third process of separating PDMS substrate from the silicon master substrate; and a fourth process of culturing neural cells on the PDMS substrate to obtain neuron chip in which at least one neural cell is patterned.
申请公布号 KR20100023370(A) 申请公布日期 2010.03.04
申请号 KR20080082089 申请日期 2008.08.21
申请人 INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY 发明人 JUNG, HYO IL;KIM, JAE YOUNG;LEE, JONG EUN;KIM, JU HAN;KIM, JAE HWAN
分类号 G01N33/552;G01N33/53 主分类号 G01N33/552
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