发明名称 RECEIVER I/Q GROUP DELAY MISMATCH CORRECTION
摘要 A device for minimizing group delay mismatch in a quadrature receiver (402) having an in-phase channel and a quadrature-phase channel. The device includes a microprocessor (465) for determining an I/Q phase imbalance between digital signals on an in-phase channel and digital signals on a quadrature-phase channel, and for calculating a group delay mismatch between the in-phase channel and the quadrature-phase channel, and a group delay equalizer (426). The group delay equalizer includes a delay line (505 and 605) for delaying one of the in-phase channel and the quadrature-phase channel by one of a plurality of delays, based on an amount of group delay mismatch.
申请公布号 US2010054367(A1) 申请公布日期 2010.03.04
申请号 US20080199089 申请日期 2008.08.27
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 GORDAY ROBERT MARK
分类号 H04L27/00 主分类号 H04L27/00
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