| 摘要 |
<p>An image data processing apparatus includes a temporary reception buffer. A reception interface section generates first write addresses and first read address for the temporary reception buffer and memory write addresses for a storage unit. When pixel data for a first block are continuously and sequentially supplied, the pixel data are stored in the temporary reception buffer in units of second blocks. The stored pixel data are read from the temporary reception buffer in units of third blocks while the pixel data for the second block are stored in the temporary reception buffer. The read pixel data for the third blocks of the second block are stored in the storage unit in units of columns of each of the third blocks.</p> |
