发明名称 Enhancing relocatability of partial configuration bitstreams
摘要 Enhancing relocatability of partial configuration bitstreams from a first area to a second area of programmable logic of an integrated circuit is described. A first set and a second set of logic resources of the programmable logic are identified. The first set and the second set of logic resources are respectively associated with the first area and the second area, the second area being wholly or partially offset from the first area. Differences between the first set of logic resources and the second set of logic resources are identified. The differences are associated with one or more of different types of circuit resources in each of the first area and the second area. Prohibit constraints associated with the differences are set.
申请公布号 US7673271(B1) 申请公布日期 2010.03.02
申请号 US20060599134 申请日期 2006.11.14
申请人 发明人 BECKER TOBIAS J.;BLODGET BRANDON J.
分类号 G06F17/50;H03K17/693 主分类号 G06F17/50
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