发明名称 Jitter insensitive single bit digital to analog converter
摘要 Systems and methods for a jitter insensitive 1-bit digital to analog converter (DAC) are described. The jitter insensitive 1-bit DAC employed in the feedback loop of a delta sigma analog to digital converter (ADC) converts a 1-bit digital data into the corresponding analog output.
申请公布号 US7671773(B2) 申请公布日期 2010.03.02
申请号 US20070948001 申请日期 2007.11.30
申请人 INFINEON TECHNOLOGIES AG 发明人 CEBALLOS JOSE LUIS
分类号 H03M3/00 主分类号 H03M3/00
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