发明名称 WIRING BOARD AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a wiring board and a semiconductor device which reduce warpage and improve the coplanarity, while ensuring flexibility of routing of a wiring pattern formed at the wiring board. Ž<P>SOLUTION: THere are provided a rectangular semiconductor chip containing two or more electrodes, a wiring board 10, in which a semiconductor chip is mounted on one main face, and which includes a wiring pattern for connecting two or more electrodes, contained in the semiconductor chip with two or more external electrodes arranged in a row on the other main face; and a sealing resin 13, accumulated at least on part of one main face of the wiring board 10 for sealing the semiconductor chip. The wiring board 10 includes a slit 16, which reduces the internal stresses of the sealing resin 13, on an extension line of or near the extension line of a diagonal line in the rectangular semiconductor chip. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010045311(A) 申请公布日期 2010.02.25
申请号 JP20080210077 申请日期 2008.08.18
申请人 PANASONIC CORP 发明人 TOKUSHIMA KENJI;OTANI KATSUMI
分类号 H01L23/12 主分类号 H01L23/12
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